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4/27/2006
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Intel To Speed Product Releases, Cut Costs

Intel CEO Paul Otellini, speaking Thursday at Intel Analyst Day in New York, gave a sobering analysis of the chip giant's missteps over the past year, including an admission that its server road map was weak and its execution off the mark.

Stung by declining sales and market-share losses to rival Advanced Micro Devices, Intel plans to slash costs, accelerate product releases and ensure channel partners have an adequate supply.

Intel CEO Paul Otellini, speaking Thursday at Intel Analyst Day in New York, gave a sobering analysis of the chip giant’s missteps over the past year, including an admission that its server road map has been weak and its execution off the mark.

"We are very well-aware of the realities of our current and future business outlook," Otellini told analysts. "We are taking actions to address those realities."

Moves that Intel aims to make include a $1 billion cut in planned spending for 2006 and a top-to-bottom review of the Santa Clara, Calif., company’s entire corporate structure. "No stone will be unturned," Otellini said.

On the technology front, Intel plans to hasten its transition to dual-core processors and chips built on a 65nm manufacturing process, which is more efficient than previous 90 nm process, Otellini said.

In addition, the company also aims to produce Broadwater chipsets in ample supply for the channel by using new manufacturing methods and launch an aggressive rollout for the upcoming Woodcrest, Conroe and Merom processors by late summer, burning up one to two weeks of inventory in the OEM and white-box channels and gray market, he said.

Plans call for Intel to ship the Woodcrest server processor in June, the Conroe desktop processor in July and the Merom mobile processor in August, Otellini said. The chips promise performance gains of 80 percent, 40 percent and 20 percent, respectively, he said.

"We wanted to get performance in the marketplace in servers first, where we needed it the most," Otellini said, acknowledging that the market has had its most serious questions about Intel's position in that space.

Looking at the long term, Otellini said Intel will begin to merge its new silicon technology with its microarchitecture technology. In 2008, in conjunction with its shift to 45nm process technology, Intel plans to roll out its next microarchitecture, code-named Nehalem. And in 2010, with the shift to 32nm process technology, Intel expects to release another new microarchitecture, code-named Gesher.

Otellini said Intel also is working on lower-cost products, including technology to enable a sub-$400 notebook for the education market, expected to be ready by 2007.

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