JIT Compilation to Hardware - InformationWeek
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JIT Compilation to Hardware

An interesting area of research in programming languages that is gathering steam is the idea of reconfiguring hardware on the fly in response to the needs of software.

An interesting area of research in programming languages that is gathering steam is the idea of reconfiguring hardware on the fly in response to the needs of software.

Dynamic FPGA reconfiguration, or JIT hardware compilation, is an interesting area of research, and a tough nut to crack because of the high latency involved in configuring the hardware. However, once you pass the cost-benefit threshold the pay-off can be extremely significant. Custom hardware can potentially be very fast because it can exploit microcode parallelization opportunities.

While JIT hardware compilation is still in its infancy IBM is now showing some clear interest in it. For example they are developing a new language based on Java called Liquid Metal (or Lime) is aimed at supporting JIT hardware compilation.

What is making this possible is research into new ways to reduce the latency of FPGA configuration, such as described in the paper Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs (unfortunately not freely available).

I'd be interested in hearing about any other projects involving JIT hardware compilation, and what your thoughts are about its implications on future technology.

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