System Description: The Apple-II by Stephen Wozniak
In this BYTE article from May 1977 Stephen Wozniak describes the hardware and system software in the then brand new Apple II. Circuit diagrams and BASIC listing are included.
It is all eged in the Santa Clara (Silicon) Valley that the microprocessor was invented to sell programmable and read only memory chips. It certainly has been the case that one microprocessor in the past would often support hundreds of memory chips, but times change. Technology has since bestowed upon us the 4 K bit and 16 K bit dynamic programmable memory chips.
Apple-II was designed to operate with the 16 pin dynamic programmable memory parts, which come in 4 K and 16 K versions which are (with some subtleties) pin for pin compatible.
The Apple-II board is supplied with sockets for three blocks of memory, each of which may be configured to use either 4 K or 16 K dynamic programmable memory parts, with intermixing allowed . This means that if you were to purchase an Apple with 4 K bytes of memory and later want to add 16 K bytes, there is no need to scrap the 4 K chips.
Dynamic memories have one design characteristic which is not present in the simpler (but more expensive) static memories. This is the fact that they use capacitive storage elements built into the chips which must be periodically recharged ("refreshed") to prevent the information from disappearing.
Photo 3: Two examples of the Apple BASIC interpreter, in the form of programs with several lines of execution results. (a) The interpreter has a symbolic trace feature which allows dumping of named variables whenever a change occurs. This simple program illustrates this "DSP" command with a simple computational program. (b) A similar debugging feature of Steve Wozniak's Apple BASIC interpreter is a method of running the interpreter with a statement number trace, by giving a TRACE command instead of RUN in the command mode of the interpreter. This enables one to fairly quickly debug a BASIC program by examining its effect on variables or its course of evolution through statement numbers.
One of the elegant simplifications provided by a system such as the Apple-II with its built-in display is the fact that refreshing the entire memory address space of dynamic memory chips is inherent in the operation of the video display generator. On successive pulses of the video display, it cycles through all the low order addresses of the memories as the memory is scanned to generate the video image. But scanning through the addresses with in the maximum allowable time is the algorithm used to accomplish the required refreshing of the memories; so with this video generator integral to the computer, refreshing of the memories happens to come for free and is totally transparent to the user with no extended, missing or delayed cycles. This characteristic is sometimes called "hidden refresh."
I designed the Apple-II to come with a set of standard peripherals, in order to fit my concept of a personal computer. In ad dition to the video display, color graphics and high resolution graphics, this design includes a keyboard interface, audio assette interface, four analog game paddle inputs (for user supplied potentiometers which vary a resistance which the processor measures), three switch inputs, four 1 bit annunciator outputs, and even an audio output to a speaker. Also part of the Apple-II design is an 8 slot motherboard for IO which has a fully buffered bus, prioritized interrupts, two prioritized direct memory access (DMA) schemes, and address decoding at the individual slots so that multiple bit address decoders are not required on peripheral boards.
The Apple-II cassette interface is simple, fast, and I think most reliable. The data transfer rate averages over 180 bytes per
second, and the recording scheme is compatible with the interface used with the Apple-I. This tape recording method can be used with any inexpensive recorder, but as with any such use of audio media only high quality tapes shou ld be used in order to avoid problems due to dropouts from poor oxide coatings on the tapes. In the Apple audio cassette interface, timing is performed by software which is referenced to the system clock, A zero bit is defined as a full cycle of a 2000 Hz signal (500 μs long), while a one bit is defined as a full cycle of a 1000 Hz signal (1 ms long). While reading data, full cycles are sampled, never half cycles, a method which tends to provide immunity to DC offset and other forms of distortion. All the cassette management routines are avail able to user programs as subroutine calls from asse mbly language directly, or through hooks in the BASIC interpreter.
5 Top Federal Initiatives For 2015As InformationWeek Government readers were busy firming up their fiscal year 2015 budgets, we asked them to rate more than 30 IT initiatives in terms of importance and current leadership focus. No surprise, among more than 30 options, security is No. 1. After that, things get less predictable.
Join us for a roundup of the top stories on InformationWeek.com for the week of December 14, 2014. Be here for the show and for the incredible Friday Afternoon Conversation that runs beside the program.