Evaluating the Potential of Future On-Chip Clock Distribution Using Optical Interconnects


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Source: Hewlett-Packard
Date: January 2008
Type: White Paper
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Overview: Designing clock distribution networks is a big challenge for future microprocessors due to increasing frequency, power, transistor counts and process variations. As technology scales, implementing conventional clock distribution networks that meet low power and skew requirements is becoming more difficult. On the other hand, optical interconnects are being proposed as an alternative to electrical interconnects due to their speed-of-light transmission, high bandwidth and low power dissipation. The white paper looks at the clock distribution trends in major microprocessor families, possible techniques for optical clocking, and the potential of moving from electrical to optical clock distribution.

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