Set Up Procedure for Performance Characterization Results: Benchmark to Demonstrate Improvement in SIP Performance for IMS, Powered by Dual-Core Intel Xeon Processors


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Source: Intel
Date: January 2008
Type: White Paper
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Overview: SIP testing was performed to determine a relative comparison of Single Board Computer (SBC) performance reflecting the performance of the microprocessor, memory architecture, and compiler of a computer system on compute-intensive, 32-bit applications. The test results were determined using specific, well-configured systems. These results may or may not reflect the relative performance of an SBC in systems with different hardware, software designs or configurations (including compilers). This paper provides the detailed technical information necessary to understand test parameters and results characterizing SBC performance for IMS workload based on SIP transactions.

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