The Defense Advanced Research Project Agency's (DARPA's) Diverse Accessible Heterogeneous Integration (DAHI) program is launching the DAHI Foundry Technology effort to find new methods to overcome the current limitations of chip design and find a way to combine materials on a single silicon chip, according to DARPA.
Current foundry methods limit the types of materials and devices that can be integrated on one microprocessor. However, to gain an advantage over adversaries in areas such as communications, sensing, and electronic warfare, DOD wants microprocessors that minimize the performance limitations that come with the physical separation among devices at the design level, according to DARPA.
"Enabling the ability to 'mix and match' a wide variety of devices and materials on a common silicon substrate would allow circuit designers to select the best device for each function within their designs," said Thomas Lee, office director of DARPA's microsystems technology office, in a statement. "This effort also seeks to enable complex signal-processing and self-correction architectures to be brought to bear."
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The DAHI Foundry Technology effort has three technical areas of interest: DAHI process development, foundry establishment, and circuit design innovation, said a notice about the program posted on FedBizOpps.gov.
DARPA aims to spend the bulk of its $80 million to $100 million in initial funding in the second technical area, and encourages proposers to focus on one of the three areas of interest, the agency said.
Research on next-generation chip technology is of particular interest to the feds, as the semiconductor industry is big business, representing the United States' largest export product and a significant employer of American workers.
Indeed, DARPA said it hopes to transfer the integration technologies developed through the DAHI Foundry Technology program to the private sector and greater defense industry, through licensing, partnerships, or direct implementations, according to the notice.
The National Institute of Standards and Technology (NIST) also is funding research in next-generation chip technology through a grant of $2.6 million that will be awarded for a research project to develop new ideas in chips beyond existing complementary metal oxide semiconductor (CMOS) technology.
DARPA will hold a proposer's day in April to identify possible participants in the DAHI Foundry Technology. Proposals will be due July 9, DARPA said.
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