AMD Describes Notebook Processor

AMD’s next-gen notebook processor, Carrizo, packs a south bridge and HEVC decoder in the same space as its previous Kaveri chip, it said at ISSCC.

Rick Merritt, SiliconValley Bureau Chief, EE Times

February 25, 2015

2 Min Read

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SAN FRANCISCO — Advanced Micro Devices will describe at the International Solid-State Circuits Conference here the engineering prowess behind its next-generation notebook processor. Carrizo packs 29% more transistors and squeezes double-digit gains in performance and drops in power consumption out of the same 28nm process and die area as its current Kaveri chip.

AMD uses the extra space to pack its previously external south bridge I/O unit into the die, saving system level power. The company claims the chip is also the first x86 to provide hardware-assisted decode of the new High Efficiency Video Codec (H.265).

The net result is a chip that will sport power and performance advantages for some mainstream notebooks over its competitor, Intel’s Broadwell made in a 14nm FinFET process that debuted at CES in January. However, Intel still commands a significant lead in CPU performance. In addition, the 12-35W Carrizo family requires a fan making it too hot and power hungry to find sockets in tablets.

The net accomplishment of Carrizo is impressive, but its unclear if the business impact will be adequate to assure healthy growth for the company led by its new chief executive, Lisa Su. AMD lost $330 million in its latest quarter and laid off 7% of its staff in October, a week after Su took over as CEO.

Read the rest of this story on EE Times.

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About the Author(s)

Rick Merritt

SiliconValley Bureau Chief, EE Times

Based in San Jose, Rick writes news and analysis about the electronics industry and the engineering profession for EE Times. He is the editor of the Android, Internet of Things, Wireless/Networking, and Medical Designlines. He joined EE Times in 1992 as a Hong Kong based reporter and has served as editor in chief of EE Times and OEM Magazine.

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