Intel, AMD Redesign Chips For Faster Virtualized Servers

Two years ago, less than 5% of the data center had been virtualized. By 2010, Intel projects that 25% of enterprise data center servers will be running in virtualization mode.

Charles Babcock, Editor at Large, Cloud

July 5, 2007

4 Min Read

The rapid adoption of virtualization is having a big impact on server design as server architects go back to the drawing boards to figure out how to build more virtualization-friendly features into their designs.

"Virtualization has thrown us for a loop, quite honestly," said Shannon Poulin, Intel enterprise marketing manager, last month at an IDC conference on virtualization. Two years ago, less than 5% of the data center had been virtualized. By 2010, Intel projects that 25% of enterprise data center servers will be running in virtualization mode. Server design is trying to catch up with the trend, Poulin said.

But knowing whether a server is performing well under virtualization is still something of a guessing game. "The virtualized environment is the Wild West when it comes to performance benchmarking," he noted.

"I think we're only in the infancy" of designing servers for virtualized operation, he added. For one thing, servers intended to host virtual machines need lots of memory, since each virtual machine gets an indivisible allotment. IT managers planning to use a server for virtualization tend to stack them to the gills with memory, allowing more virtual machines per server. Much of what both Intel and AMD are doing with their designs applies to memory management.

Poulin's comments were echoed at the same event by Tim Mueting, director of virtualization solutions at AMD. Virtualization as it stands today tends to impose a performance overhead as high as 20% as the virtual machine software, such as Microsoft Virtual Server or VMware Server, negotiate through an operating system to talk to the hardware. Hypervisors talk directly to the hardware, reducing the overhead.

"Our goal is to reduce that overhead further," said Mueting. In the long run, the chip manufacturers say, they want to make the difference between physical and virtual server operation negligible.

The original x86 instruction set that is used by both Intel and AMD chips had no way of recognizing a virtual machine. But since the two firms added virtualization hooks to their chips last year, known as AMD's Pacifica and Intel's Virtual Technology, the instruction set can run a virtual machine hypervisor -- a sort of thin, guest operating system talking directly to the hardware -- much more efficiently.

In effect, instructions have been added to the x86 set, such as VRun, which tell the processor to treat a hypervisor as a privileged guest with direct access to hardware functions. Once the hypervisor, such as open source Xen or VMware's ESX Server, is talking directly to the chip, a large portion of the overhead is erased.

Intel's Poulin said future Intel motherboards for four-way servers will contain a "Flex" feature to assist in the migration of virtual machines across different servers. The ability to migrate a running virtual machine from one physical server to another is one of the strongest selling points of virtualization. VMware, SWsoft, and Hewlett-Packard offer virtualization management tools that can accomplish such a move, but migration sometimes doesn't cross boundaries between chips from the same manufacturer. In addition, no one is able to migrate from Intel to AMD-based servers or vice versa.

Poulin said Intel's second generation virtualization hooks will let a virtual machine migrate across all Intel chips and breach the Intel/AMD barrier.

Both Intel and AMD are delving deeper into chip operations to make them more virtualizable. For example, they enlarge caches that store data for virtual machines and improve the switching speed between a virtual machine and the other devices on the server, such as the network interface card.

AMD is seeking competitive advantage by moving memory management for virtual machines back onto the chip. Instead of requiring the hypervisor to manage the use of memory by each virtual machine in a duplicate set of memory management tables, AMD gets the processor to do it by providing a link to its on-chip memory management unit.

"The hypervisor can do it directly through the hardware." Eliminating the hypervisor's "duplicate" tables results in applications running up to 50% faster, he claimed.

"Let's move these virtual processes down [from software], move them into the hardware," said Mueting.

About the Author(s)

Charles Babcock

Editor at Large, Cloud

Charles Babcock is an editor-at-large for InformationWeek and author of Management Strategies for the Cloud Revolution, a McGraw-Hill book. He is the former editor-in-chief of Digital News, former software editor of Computerworld and former technology editor of Interactive Week. He is a graduate of Syracuse University where he obtained a bachelor's degree in journalism. He joined the publication in 2003.

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