IBM Unveils Power8 Chip As Open Hardware

Google and other OpenPower Foundation partners express interest in IBM's Power8 chip designs and server motherboard specs.

Charles Babcock, Editor at Large, Cloud

April 23, 2014

5 Min Read
<a href="" target="_blank">OpenPower</a>'s model.

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IBM, originally one of the most proprietary of companies, is taking a page from the Open Compute Project's book and making its latest Power8 chip designs, and the specs for the new Power8 server motherboard, available to both collaborators and competitors.

Under this OpenPower ecosystem, any partner or competitor may negotiate a license with IBM and take Power8 designs to a chip fabricator to produce CPUs for its own products. They may likewise take Power chips and use them in their own servers and products, said Steve Sibley, IBM's director of Power Systems, in an interview.

IBM plans to announce both moves at an Innovation Summit in San Francisco Wednesday, in part because support for OpenPower has come from some large West Coast partners. Google, an original member (along with Mellanox, Nvidia, and Tyan) of the OpenPower Foundation organized last August, has expressed interest in using IBM Power8 servers. Google hasn't specified whether it's looking to Power8 for big-data processing servers or general purpose, search engine, and cloud computing servers.

Tyan, a custom hardware manufacturer with engineering centers in Taiwan, China, and the US, announced Wednesday it has produced a Power8 reference design for whitebox server production.

Another open hardware initiative, the Open Compute Project founded by Facebook, includes Dell and HP, as well as small third-party manufacturers including Hyve, Avnet, and Penguin, that produce custom, whitebox designs. Open Compute began two years before OpenPower's launch.

[Want to learn more about the Open Compute Project? See Open Source Hardware: Prepare For Disruption.]

Power8 has been designed with some specific big-data handling characteristics. It is, for example, an eight-threaded processor, meaning each of 12 cores in a CPU will coordinate the processing of eight sets of instructions at a time -- a total of 96 processes, Sibley told us. By "processes," he means a set of related instructions making up a discrete process within a program. By designating sections of an application that can run as a process and coordinate the results, a chip can accomplish more work than a single-threaded chip.

Intel's Sandy Bridge E5 Xeon CPUs are double-threaded cores, with up to eight cores in a CPU, handling 16 processes at a time. The speed of execution is also important, and a small amount of coordination overhead is incurred as more threads are added. Nevertheless, the Power8 chip will attract interest among whitebox manufacturers and users of large numbers of servers processing big data, Sibley predicts.

Figure 1: OpenPower's model. OpenPower's model.

Like Sandy Bridge, IBM will manufacture Power8s by June with 22 nanometer circuits. It will run between 2.5 and 5 GHz. IBM estimates it will do two or three times the amount of processing work as the predecessor Power7 chip. In some cases, it will be able to analyze data "50 times faster than the latest x86-based systems," Sibley claims.

Such comparisons often pit one manufacturer's latest generation against a competitor's aging generation. Nevertheless, the Power8 has a clear lead in certain areas. It is built in 15 metal layers, using a silicon-on-insulator fabrication process. They contain 4.2 billion transistors, compared to the 1.16 billion to 2.27 billion on Sandy Bridge.

Sibley says IBM's most significant changes in Power8 are concerned with how

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it has re-engineered the chip to make it more open to third-party modification and use.

It has dispensed with the Power7's GX++ interface to external communications and substituted the Coherence Accelerator Processor Interface (CAPI) on top of the serial expansion bus for connecting peripherals. Nvidia will use CAPI to tie its latest graphics processor unit directly into the Power8 CPU. Doing so means both processors may share the same memory and closely coordinate their tasks. CAPI could also be used to connect an application-specific integrated circuit (ASIC) to a Power8 or a field-programmable gate array, which can be programmed by a third party or Power8 server customer to do work the customer wants in connection with the CPU.

"This is the first truly disruptive advancement in high-end server technology in decades," said Tom Rosamilia, senior VP, IBM Systems and Technology Group, in the announcement. He said both IBM customers and third parties will be able to design new data-handling applications based on the Power8 architecture. IBM has optimized its own big-data software systems to run on Power8, including IBM Solution for BLU Acceleration, IBM Solution for Analytics, and IBM Solution for Hadoop.

IBM also announced it will support Ubuntu Server on Power8 for the first time, along with previously supported Red Hat Enterprise Linux and Suse Linux.

Sibley says the Power8 architecture's expanding feature set, along with its big-data handling capabilities, made it more attractive to partners and third parties. By building a wider ecosystem, IBM will ultimately find a wider market for its Power chips.

One way to exploit the CAPI interface is to produce applications that manage the hardware resources for specific purposes. IBM will produce an optimization program for exploiting a flash drawer -- a set of flash drives on a rackmounted tray that slides in and out. Closely tied to the CPU, such a flash memory pool could be used to augment RAM or caching operations in connection with data-intensive applications, such as Hadoop or other NoSQL systems, he says.

"You will see workload-specific acceleration applications," he predicts, asserting that the wider bandwidth for data movement built into the chip, along with on-chip memory controllers, gives the Power8 the ability to move data four times as fast as comparable x86 systems.

The starting price on a Power8 server is $7,973.

Could the growing movement toward open-source hardware rewrite the rules for computer and networking hardware the way Linux, Apache, and Android have for software? Also in the Open Source Hardware issue of InformationWeek: Mark Hurd explains his "once-in-a-career opportunity" at Oracle.

About the Author(s)

Charles Babcock

Editor at Large, Cloud

Charles Babcock is an editor-at-large for InformationWeek and author of Management Strategies for the Cloud Revolution, a McGraw-Hill book. He is the former editor-in-chief of Digital News, former software editor of Computerworld and former technology editor of Interactive Week. He is a graduate of Syracuse University where he obtained a bachelor's degree in journalism. He joined the publication in 2003.

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