Partners Release First Detailed Specs For Cell Microprocessor

IBM, Sony and Toshiba have for the first time released detailed specifications for the Cell microprocessor.

Ron Wilson, Contributor

August 25, 2005

2 Min Read

FREMONT, Calif. — Delivering on a promise made in May, IBM, Sony and Toshiba have for the first time released detailed specifications for the Cell microprocessor.

Available Thursday (Aug. 25) for free download, the documents will enable developers outside the initial circle of Playstation3 engineers to begin detailed evaluation of the architecture.

"These documents include very detailed specifications on the Cell — the instruction set, the C and C++ extensions for expressing parallelism and the overall chip architecture," said IBM Power Everywhere program director Dan Greenberg. "It will now be possible for potential users outside the Playstation space to begin serious evaluation of the architecture for other applications."

The documents will be backed up by an array of internally-developed tools, including a cycle-accurate instruction set simulator, from IBM Engineering and Technology Services.

Using the available tools, developers will be able to familiarize themselves with the details of the architecture well beyond the broad outlines that have been disclosed at numerous technical conferences this year. It will also be possible to begin writing and simulating code to explore critical loops, parallelization, data transport within the chip and other key issues for the evaluation process.

For now, Greenberg suggested, the tool set is intended for such evaluations, rather than for full development efforts. Tasks specific to the Cell architecture, such as separating the application into multiple threads, segregating the control from the data threads and parallelizing the data activities, will initially be manual.

IBM is still working on a revolutionary tool — a single-source compiler that can take in a single code stream and map threads onto processor resources using a SIMD model and the explicit management of the Cell synergistic processors' local storage.

The compiler can deal with the complexities of routing streaming data through the chip as well. The single-source compiler is still under investigation and not scheduled for release. However, it was the subject of a paper at this year's Cool Chips conference in Japan.

"We envision that there will always be a role for hand optimization in critical areas of a design," Greenberg said. "But we believe that the single-source compiler may be able to do a great deal of the initial work, leaving for the designers only hand-tweaking, rather than reorganization of the whole code set."

One key piece of the puzzle made available in today's release is the list of parallelism extensions IBM has made to their C/C++ compiler for Cell. These, Greenberg speculated, might be generally useful to design teams who are struggling with the challenges of developing parallel code — even outside the Cell architecture.

Read more about:


About the Author(s)

Never Miss a Beat: Get a snapshot of the issues affecting the IT industry straight to your inbox.

You May Also Like

More Insights